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Front Port Technology Options For The Future-Proof FPGA Platform

This is the third in a three-part series on the origins of the Ethernet

7Feb

Part 1 of this series recounted a brief history of the Ethernet, and Part 2 explored the longevity and upgradability of future-proof FPGA platforms. This third and final installment of the series focuses on the available pluggable front port technology, complementing the flexible properties of future-proof FPGA-based smart NICs.

With that, here are the properties of front port technology that define its flexibility:

1. Level of backward compatibility

2. Number of link types supported

3. Number of link rates supported

4. Available lane breakout functionality

There are many options on the market today for IEEE/MSA-defined front port form factors that support link speeds up to 400G. Only a reduced subset of these meet the physical outline limitations imposed by the PCIe standard. With a focus on the high-end smart NIC use case, this article will explore the PCIe-compliant multilane-based subset.

Level of Backward Compatibility

A front port module form factor, in this setting, is considered backward compatible if it supports deployment of at least one previous generation of pluggable modules. The multilane pluggable form factors are currently dominated by two families: the QSFPx family and the CFPx family (see Figures 1 and 2).

It would appear, initially, that the two families provide the same functionality, but a more careful inspection reveals significant differences in their offering, having justified their co-existence thus far. The CFPx family is targeted at telecom use cases where performance is more important than price and power consumption. Whereas the CFPx family has no backward compatible members, the QSFPx family is fully backward compatible, enabling deployment of all previous pluggable family members, in a given form factor member. The latest addition to the QSFPx family is the QSFP-DD form factor, which brilliantly introduces a doubling of the available number of lanes on the system side without sacrificing backward compatibility.

Number of Link Types Supported

Market demand and the power envelope of the form factor dictate the number of link types supported by a given form factor. The link types supported by the QSFPx form factor family is primarily defined by datacenter and enterprise applications. The SR link type is used massively in this segment, but LR and PSM volume is ramping due to the mega-sizing going on in the datacenters. With a primary focus on the telecom use cases, the CFPx form factor family members have historically provided the space needed to implement the current relevant link types, including the power-consuming long-haul distances.

For each addition of new CFPx family members, the gap in the supported link types between the CFPx and the QSFPx family typically increases. Subsequently, over time, the gap decreases as the technology allows the QSFPx form-factor to catch up. This is a phenomenon that is usually driven by commercial market demand.

Number of Link Rates Supported

Not only does form factor backward compatibility enable multi-link speed support, but deployment of dual Ethernet rate modules allows the smart NIC to support several Ethernet link speeds without physically changing the front port pluggable module. As an example, a QSFP28 port will enable deployment of a 100GBASE-SR4 dual-rate module in the following four modes:

1. 4x 10G ports, breakout

2. 4x 25G ports, breakout

3. 1x 40G port

4. 1x 100G port

Several dual-rate offerings are currently on offer, which supports the QSFPx form factor family and adds further flexibility to this form factor.

Available Lane Breakout Functionality

When the 40GBASE link-type family was introduced in 2010, there was, for the first time, a standardized multi-lane-based pluggable front port form factor: the QSFP+. This form factor deploys four 10G lanes on the system side in order to handle the 40G aggregate bandwidth on the media side. In a market environment that is constantly struggling to increase port density, it was quickly recognized that this form factor provided the highest available 10G port density at that point in time, resulting in the availability of the first breakout connectivity solutions. Figure 3 shows a breakout solution mapping directly between an SR4 port and four SR ports (MPO/LC), in this case 100G to 25G but also supporting 40G to 10G.

New Tools for a New Era

It seems obvious from the above discussions that the QSFP28 form factor is the most flexible form that is currently available. The Ethernet has experienced significant changes since it was first introduced, and FPGA technology has evolved to support FPGA-based network acceleration cards. It is now possible to design very flexible hardware platforms; front port technology offers the flexibility today’s and tomorrow’s networks need.

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